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Microchip Technology /ATSAMV71N20 /GMAC /NCR

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Interpret as NCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LBL)LBL 0 (RXEN)RXEN 0 (TXEN)TXEN 0 (MPE)MPE 0 (CLRSTAT)CLRSTAT 0 (INCSTAT)INCSTAT 0 (WESTAT)WESTAT 0 (BP)BP 0 (TSTART)TSTART 0 (THALT)THALT 0 (TXPF)TXPF 0 (TXZQPF)TXZQPF 0 (SRTSM)SRTSM 0 (ENPBPR)ENPBPR 0 (TXPBPF)TXPBPF 0 (FNP)FNP

Description

Network Control Register

Fields

LBL

Loop Back Local
RXEN

Receive Enable
TXEN

Transmit Enable
MPE

Management Port Enable
CLRSTAT

Clear Statistics Registers
INCSTAT

Increment Statistics Registers
WESTAT

Write Enable for Statistics Registers
BP

Back pressure
TSTART

Start Transmission
THALT

Transmit Halt
TXPF

Transmit Pause Frame
TXZQPF

Transmit Zero Quantum Pause Frame
SRTSM

Store Receive Time Stamp to Memory
ENPBPR

Enable PFC Priority-based Pause Reception
TXPBPF

Transmit PFC Priority-based Pause Frame
FNP

Flush Next Packet

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data